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Huawei accelerates AI chip launches to 2027, emphasizes system-level innovation
Huawei announced Q1 2027 availability of its Ascend 960DT chip and Q3 2027 launch of the 960PR, both ahead of original schedules, while committing to annual chip releases through 2029. The company emphasized system-level innovations including near-packaged optics technology, a 4,096-card super node architecture, and software ecosystem maturity as core competitive advantages against U.S. export restrictions on advanced semiconductor technology.
Quick Facts
- Announced accelerated launch of Ascend 960DT chip to Q1 2027
- Announced Ascend 960PR launch for Q3 2027
- Introduced near-packaged optics (NPO) technology for optical interconnect
- Launched Ascend 960 super node with 4,096 accelerator cards
- Launched Hi-ONE optical engine with 36-channel 200G bandwidth


Huawei announced accelerated timelines for its next-generation Ascend AI chips on Thursday at its annual Huawei Connect conference in Shanghai, moving the Ascend 960DT to Q1 2027—three quarters ahead of schedule—and the Ascend 960PR to Q3 2027, one quarter earlier than originally planned. Rotating chairman Wang Tao outlined a sustained annual release cycle, with the Ascend 970 and 980 slated for 2028 and 2029 respectively. The company emphasized that chip development has already undergone months of laboratory testing before announcement, with Wang noting that semiconductor maturation typically requires three years from concept to commercialization.
Beyond individual chip performance, Huawei positioned its strategy around system-level architecture and integration. The company introduced what it calls a "super node" utilizing near-packaged optics (NPO) technology, which transfers high-speed data between chips using light rather than electrical signals to reduce transmission loss and power consumption. The Ascend 960 super node integrates 4,096 accelerator cards with a theoretical peak of 8 exaFLOPS in FP8 operations and over 1 petabyte of HBM capacity. Huawei's Hi-ONE optical engine, featuring 36 channels of 200G bandwidth and 7.2 terabits per second transmission capacity, replaces approximately 48,000 conventional optical modules, reducing power consumption by over 550 kilowatts and doubling mean time between failures to achieve 99.8% system availability.
Huawei also highlighted advances in software ecosystem maturity. The CANN (Computer Architecture for Neural Networks) development community now has over 5,200 monthly active developers, with external contributors representing 61% of activity. Ascend chips have entered PyTorch's official support roadmap, allowing developers to access support directly through the PyTorch community. Wang stated that after eight years of development, the CANN ecosystem has "crossed an inflection point" and Huawei plans to accelerate adoption by coordinating with model makers during the pretraining phase rather than after model release.
Wang articulated Huawei's positioning as an AI infrastructure foundation provider, stating the company's core mission is to build a "computing power foundation" for Chinese AI companies. This marks a strategic boundary: Huawei's Pangu model will continue supporting internal product intelligence, but the company does not intend to compete at every layer of the AI stack. Huawei disclosed that multiple super nodes can scale to 512,000 cards using Lingqu networking or RoCE protocols, with a theoretical ceiling of 1 million cards through multi-tier topology, though Wang noted practical deployment remains constrained by investment, electricity supply, and model requirements.
The acceleration reflects Huawei's response to U.S. export restrictions on advanced semiconductor technology and manufacturing equipment to China. Without unrestricted access to Nvidia's most advanced processors, Chinese companies are developing domestic alternatives by combining larger numbers of domestically available chips through enhanced interconnect and system architecture. Analyst Rui Ma noted that while the Ascend 960 chip timeline has accelerated significantly, the announced Atlas 960 SuperPod configuration (4,096 chips) is substantially smaller than previously stated plans (15,488 chips), indicating trade-offs between technical capability and current manufacturing constraints. Huawei's approach extends beyond fabrication constraints by emphasizing optical interconnect, unified memory addressing across physical nodes, and comprehensive system engineering—areas where the company claims decades of integrated research across communications, networking, optics, and infrastructure.
Wang also outlined Huawei's longer-term technology roadmap, acknowledging that while advanced semiconductor nodes remain important, China's chip manufacturing has not yet achieved complete technical breakthroughs. Consequently, Huawei is pursuing parallel innovation pathways through packaging, interconnect technology, optical communication, system architecture, and software coordination to maximize computing efficiency within current manufacturing constraints. He characterized this strategy as a "path to victory" born from necessity, allowing Huawei to reduce the performance gap with leading international AI chips and systems while continuing to support domestic AI model companies and enterprise applications.
Why This Matters
Huawei's accelerated chip roadmap and system-level integration strategy directly affect Chinese AI infrastructure procurement and international semiconductor supply chain dynamics. The company's pivot toward optical interconnect, packaging innovation, and software ecosystem development (CANN with 5,200+ monthly developers) signals a domestic alternative pathway to advanced computing for Chinese AI firms facing restrictions on Nvidia's latest processors. Announced timelines and technical specifications (4,096-card super node, 8 exaFLOPS FP8 capacity, 99.8% availability) will influence purchasing decisions by Chinese cloud providers, model developers, and enterprises through 2029. Trade-offs between stated capacity (15,488 cards in earlier plans vs. 4,096 current) and manufacturing constraints may affect model training performance and deployment economics across the region.
Timeline & Sources
Sep 16, 2026
WireHuawei announces accelerated AI chip roadmap at Huawei Connect conference in Shanghai
Sep 17, 2026
WireDavid Wang announces accelerated AI chip launch timelines at Huawei Connect conference in Shanghai
Jan 1, 2029
WireAscend 980 chip planned release
Jan 1, 2029
WireAscend 980 chip planned launch
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Sources
- Huawei Set to Unveil China’s Best Answer to Nvidia AI Chip ReignBloomberg.comWireSep 16, 2026
- Huawei plans Q1 2027 launch of new AI chip as it takes on NvidiatechcrunchMediaSep 17, 2026
- 华为计划明年发布两款新晶片zaobaoMediaSep 17, 2026
- NVDA Stock In Focus As Huawei Announces 2 Advanced AI Chips For 2027Yahoo FinanceMediaSep 17, 2026
- Tech Brief (Sept. 18): Huawei Speeds Up AI Chip Roadmapcaixin_globalMediaSep 18, 2026
- 华为汪涛:华为要打造AI算力底座,只做好一颗芯片远远不够qbitaiMediaSep 19, 2026